Learn the Basics of FPGA Design
Explore our free and comprehensive tutorials covering two of the major programming languages used in the design and verification of FPGAs.
Hi, I'm John
I am the founder and main author of fpgatutorial.com. I have been designing FPGAs for more than 10 years whilst working at large tech companies and research institutes in the UK and Germany.
On this site I will teach you the basics of the most commonly used languages for FPGA design – VHDL, Verilog and System Verilog (coming soon).
Or get more advanced, practical guidance from our blog section which covers a wide range of FPGA related topics.
Latest Posts
An Introduction to Loops in Verilog
In this post we look at the different types of loop which we can use in our verilog designs.
If Statements and Case Statements in Verilog
In this post we talk about two of the most commonly used sequential statements in verilog – the if statement and case statement
How to Write a Basic Verilog Testbench
In this post we talk about testing our verilog based designs using basic test benches.
Using the Always Block to Model Sequential Logic in Verilog
In this post we discuss the coding methods we can use to model basic sequential logic circuits using Verilog.
Verilog Operators and the Assign Keyword for Combinational Logic Circuits
In this post we look at the basic operators in verilog and how we can use these with the assign keyword to model combinational logic circuits.
An Introduction to Verilog Data Types and Arrays
In this post we talk about the different types we can use in verilog.