Getting Started

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In these introductory posts we discuss the FPGA development process from start to finish. This includes synthesis, place and route, timing and verification. However, we do not look at the coding of FPGAs in detail in these posts.

If you are new to FPGAs then it is recommended to read the first post before reading through the VHDL tutorials or Verilog tutorials which cover programming in more depth. This post is an overview of the entire process which will be useful for understanding the concepts we discuss in the programming tutorials.

The other posts in this section feature a more detailed discussion of each stage of the FPGA development process. These are useful resources for building a more in depth understanding of each of the stages in the design life cycle.

Introduction to the FPGA Development Process
In this post we give a broad overview of the FPGA development life cycle. This includes an introduction to the design, verification and implementation (synthesis and place and route) processes.
FPGA Design Introduction
In the previous post in this series, we saw an overview of the typical FPGA development life cycle. In this post, we talk about the design process in more detail.
FPGA Build Process
In the previous post in this series we talked about the process of creating an FPGA design. Once we have proven our design works, we then transfer the functional HDL